One of the key processing methods in fabrication of semiconductors, integrated electrical circuits, integrated optical, magnetic, and mechanical circuits and microdevices is forming very small patterns.
Lithography is often used to create a pattern in a thin film carried on a substrate so that, in subsequent process steps, the pattern will be replicated in the substrate or in another material which is added onto the substrate. One purpose the thin film satisfies is protecting a part of the substrate so that in subsequent replication steps, the unprotected portion can be selectively etched or patterned. Thus, the thin film is often referred to as a resist.
A typical lithography process for the integrated circuits fabrication involves exposing a resist with a beam of energetic particles which are electrons, or photons, or ions, by either passing a flood beam through a mask or scanning a focused beam. The particle beam changes the chemical structure of the exposed area of the film, so that when immersed in a developer, either the exposed area or the unexposed area of the resist will be removed to recreate the pattern or obverse of the pattern, of the mask. A limitation on this type of lithography is that the resolution of the image being formed is limited by the wavelength of the particles, the particle scattering in the resist, the substrate, and the properties of the resist. Although pattern sizes greater than 200 nm can be achieved by photolithography, and pattern sizes in the range of 30 nm to 200 nm can be achieved utilizing electron beam lithography, these methods are resource intensity and suffer from low resolution.
U.S. Pat. No. 5,772,905 describes a method and apparatus for performing ultra-fine line lithography wherein a layer of thin film is deposited upon a surface of a substrate and a mold having at least one protruding feature and a recess is pressed into the thin film.
An alternative strategy to those described above is to use a “naturally occurring” or “self-assembly” structure as a template for subsequent parallel fabrication. For example, U.S. Pat. No. 4,407,695 and U.S. Pat. No. 4,801,476 describe a spin coating technique to prepare close-packed monolayers or colloidal polystyrene spheres with diameters of typically 0.1-10 microns on solid substrates. The pattern is then replicated by a variety of techniques, including evaporation through the interstices, ion milling of the spheres and/or the substrates, and related techniques. Highly ordered biologically membranes (“S-layers”) have also been suggested as starting points for fabrication. Close packed bundles of cylindrical glass fibers, which could be repeatedly drawn and repacked to reduce the diameters and lattice constant have also been used. Block copolymer films have been suggested for use as lithography masks wherein micelles of the copolymer which form on the surface of a water bath are subsequently picked up on a substrate.
To date, the focus of “self-assembly” has been primarily on either phase separation of a polymer blend, of di-block copolymers, or of local modification of surface chemistry (i.e., chemical lithography). In self-assembly by phase separation, the periodic structures are multidomain, and their orientation and locations are uncontrollable and random. A long-sought after goal in self-assembly is precise control of the orientation and location of a self-assembled polymer structure.
There is an ongoing need to produce progressively smaller pattern size. There also exist a need to develop low-cost technologies for mass-producing microscale and sub-micron (e.g. nanometer) structures. Microscale, indeed nanoscale and smaller, pattern technology will have an enormous impact in many areas of engineering and science. Both the future of semiconductor integrated circuits and the commercialization of many innovative electrical, optical, magnetic, and mechanical microdevices that are far superior to current devices will depend on such technology.